Publicacións en colaboración con investigadores/as de Swansea University (41)

2024

  1. Scaling Challenges of Nanosheet Field-Effect Transistors into Sub-2 nm Nodes

    IEEE Journal of the Electron Devices Society, Vol. 12, pp. 479-485

2022

  1. Multilevel 3-D Device Simulation Approach Applied to Deeply Scaled Nanowire Field Effect Transistors

    IEEE Transactions on Electron Devices, Vol. 69, Núm. 9, pp. 5276-5282

2021

  1. Impact of metal grain granularity on three gate-all-around advanced architectures

    International Conference on Simulation of Semiconductor Processes and Devices, SISPAD

  2. Simulations of statistical variability in n-Type FinFET, nanowire, and nanosheet FETs

    IEEE Electron Device Letters, Vol. 42, Núm. 10, pp. 1416-1419

2020

  1. Benchmarking of FinFET, Nanosheet, and Nanowire FET Architectures for Future Technology Nodes

    IEEE Access, Vol. 8, pp. 53196-53202

  2. Special issue: Nanowire field-effect transistor (FET)

    Materials

2019

  1. A multi-method simulation toolbox to study performance and variability of nanowire FETs

    Materials, Vol. 12, Núm. 15

  2. Drift-Diffusion Versus Monte Carlo Simulated ON-Current Variability in Nanowire FETs

    IEEE Access, Vol. 7, pp. 12790-12797

  3. Impact of gate edge roughness variability on FinFET and gate-all-around nanowire FET

    IEEE Electron Device Letters, Vol. 40, Núm. 4, pp. 510-513

  4. Toward a coordinated global observing system for seagrasses and marine macroalgae

    Frontiers in Marine Science, Vol. 6, Núm. JUL

2018

  1. FinFET versus gate-all-around nanowire FET: Performance, scaling, and variability

    IEEE Journal of the Electron Devices Society, Vol. 6, Núm. 1, pp. 332-340

  2. Impact of Cross-Sectional Shape on 10-nm Gate Length InGaAs FinFET Performance and Variability

    IEEE Transactions on Electron Devices, Vol. 65, Núm. 2, pp. 456-462

  3. Modelling of nanoscale multi-gate transistors affected by atomistic interface roughness

    Journal of Physics Condensed Matter, Vol. 30, Núm. 14

  4. Spatial Sensitivity of Silicon GAA Nanowire FETs under Line Edge Roughness Variations

    IEEE Journal of the Electron Devices Society, Vol. 6, pp. 601-610

2017

  1. Fluctuation Sensitivity Map: A Novel Technique to Characterise and Predict Device Behaviour Under Metal Grain Work-Function Variability Effects

    IEEE Transactions on Electron Devices, Vol. 64, Núm. 4, pp. 1695-1701

  2. Metal Grain Granularity Study on a Gate-All-Around Nanowire FET

    IEEE Transactions on Electron Devices, Vol. 64, Núm. 12, pp. 5263-5269

  3. Scaling/LER study of Si GAA nanowire FET using 3D finite element Monte Carlo simulations

    Solid-State Electronics, Vol. 128, pp. 17-24

2016

  1. Comparison of Fin-Edge Roughness and Metal Grain Work Function Variability in InGaAs and Si FinFETs

    IEEE Transactions on Electron Devices, Vol. 63, Núm. 3, pp. 1209-1216

  2. Impact of cross-section of 10.4 nm gate length Ino.53Gao.47As FinFETs on metal grain variability

    International Conference on Simulation of Semiconductor Processes and Devices, SISPAD

  3. Scaling/LER study of Si GAA nanowire FET using 3D Finite Element Monte Carlo simulations

    2016 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon, EUROSOI-ULIS 2016