DAVID
LOPEZ VILARIÑO
Profesor titular de universidade
Aalto University
Helsinki, FinlandiaPublicacións en colaboración con investigadores/as de Aalto University (2)
2005
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A one-quadrant discrete-Time cellular neural network architecture for pixel-Level snakes: B/W processing
Proceedings - IEEE International Symposium on Circuits and Systems
2002
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Implementation oriented theory design issues on the DTCNN template generation
Proceedings - IEEE International Symposium on Circuits and Systems, Vol. 3, pp. 101-104