Publikationen, an denen er mitarbeitet Juan Manuel Carrillo Calleja (8)

2023

  1. Ultra-Low-Power Low-Input-Voltage Charge Pump for Micro-Energy Harvesting Applications

    IEEE Transactions on Circuits and Systems I: Regular Papers, Vol. 70, Núm. 1, pp. 154-165

2022

  1. 0.6-V-VI N7.0-nA-IQ0.75-mA-ILCMOS Capacitor-Less LDO for Low-Voltage Micro-Energy-Harvested Supplies

    IEEE Transactions on Circuits and Systems I: Regular Papers, Vol. 69, Núm. 2, pp. 599-608

  2. An 11 mA Capacitor-Less LDO with 3.08 nA Quiescent Current and SSF-Based Adaptive Biasing

    IEEE Transactions on Circuits and Systems II: Express Briefs, Vol. 69, Núm. 3, pp. 844-848

2021

  1. A 0.6 V, ultra-low power, 1060 μm2 self-biased PTAT voltage generator for implantable biomedical devices

    AEU - International Journal of Electronics and Communications, Vol. 137

2020

  1. Compact CMOS Class-AB Output Stage with Robust Behavior against PVT Variations

    ICECS 2020 - 27th IEEE International Conference on Electronics, Circuits and Systems, Proceedings

  2. On-Chip Solar Energy Harvester and PMU with Cold Start-Up and Regulated Output Voltage for Biomedical Applications

    IEEE Transactions on Circuits and Systems I: Regular Papers, Vol. 67, Núm. 4, pp. 1103-1114

2019

  1. Design methodology of a 0.7 V, 64.5 pW @ 36°C, 1830 μm2 subthreshold voltage reference for implantable devices

    2019 26th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2019

  2. Ultralow power voltage reference circuit for implantable devices in standard CMOS technology

    International Journal of Circuit Theory and Applications, Vol. 47, Núm. 7, pp. 991-1005