Publicacións en colaboración con investigadores/as de University of Warwick (11)

2017

  1. Scaling/LER study of Si GAA nanowire FET using 3D finite element Monte Carlo simulations

    Solid-State Electronics, Vol. 128, pp. 17-24

2016

  1. 3D MC Simulations of Strain, Channel Orientation, and Quantum Confinement Effects in Nanoscale Si SOI FinFETs

    2016 INTERNATIONAL CONFERENCE ON SIMULATION OF SEMICONDUCTOR PROCESSES AND DEVICES (SISPAD)

  2. 3D MC simulations of strain, channel orientation, and quantum confinement effects in nanoscale Si SOI FinFETs

    International Conference on Simulation of Semiconductor Processes and Devices, SISPAD

  3. Anisotropic Quantum Corrections for 3-D Finite-Element Monte Carlo Simulations of Nanoscale Multigate Transistors

    IEEE Transactions on Electron Devices, Vol. 63, Núm. 3, pp. 933-939

  4. Comparison of Fin-Edge Roughness and Metal Grain Work Function Variability in InGaAs and Si FinFETs

    IEEE Transactions on Electron Devices, Vol. 63, Núm. 3, pp. 1209-1216

  5. Scaling/LER study of Si GAA nanowire FET using 3D Finite Element Monte Carlo simulations

    2016 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon, EUROSOI-ULIS 2016

2015

  1. Anisotropic schrodinger equation quantum corrections for 3D Monte Carlo simulations of nanoscale multigate transistors

    18th International Workshop on Computational Electronics, IWCE 2015

  2. Multi-Subband Interface Roughness Scattering using 3D Finite Element Monte Carlo with 2D Schodinger Equation for Simulations of sub-16nm FinFETs

    2015 INTERNATIONAL CONFERENCE ON SIMULATION OF SEMICONDUCTOR PROCESSES AND DEVICES (SISPAD)

  3. Multi-subband interface roughness scattering using 2D finite element schodinger equation for monte carlo simulations of multi-gate transistors

    18th International Workshop on Computational Electronics, IWCE 2015

  4. Multi-subband interface roughness scattering using 3D Finite Element Monte Carlo with 2D Schödinger equation for simulations of sub-16nm FinFETs

    International Conference on Simulation of Semiconductor Processes and Devices, SISPAD

  5. Variability characterisation of nanoscale Si and InGaAs fin field-effect-transistors at subthreshold

    Journal of Low Power Electronics, Vol. 11, Núm. 2, pp. 256-262